ADI ADSP-21060LCW-160 Semiconductors;Embedded processors and controllers
40 MHz SISD SHARC core (instruction execution rate: 25 ns)
Peak performance: 120 MFLOP
Compatible with all SHARC processor codes
Support for IEEE-compliant 32-bit floating point math operations, 40-bit floating point operations, and 32-bit fixed point operations
4 MB dual-port on-chip SRAM
Seamless connectivity for scalable multiprocessor DSP processing
6 communication ports for full support of point-to-point connections and multiprocessor array processing
2 synchronous serial ports with independent transmit and receive functions
10-channel DMA controller
Host Processor Interface
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